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dc.contributor.authorHasan, Md. Mubashwar
dc.contributor.supervisorDr Ahmed Abu-Siadaen_US
dc.date.accessioned2018-08-01T03:06:26Z
dc.date.available2018-08-01T03:06:26Z
dc.date.issued2018
dc.identifier.urihttp://hdl.handle.net/20.500.11937/69364
dc.description.abstract

This thesis presents a new concept of cascaded MLI (CMLI) device reduction by utilizing low and high frequency transformer link. Two CMLI topologies, symmetric and asymmetric are proposed. Compared with counterpart CMLI topologies available in the literatures, the proposed two inverter topologies in this thesis have the advantages of utilizing least number of electronic components without compromising overall performance particularly when a high number of levels is required in the output voltage waveform.

en_US
dc.publisherCurtin Universityen_US
dc.titleDesign, Optimization and Implementation of a High Frequency Link Multilevel Cascaded Inverteren_US
dc.typeThesisen_US
dcterms.educationLevelPhDen_US
curtin.departmentDepartment of Electrical and Computer Engineeringen_US
curtin.accessStatusOpen accessen_US
curtin.facultyScience and Engineeringen_US


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