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dc.contributor.authorZhang, Xuan
dc.contributor.authorOrtega-Sanchez, Cesar
dc.contributor.authorMurray, Iain
dc.identifier.citationZhang, Xuan and Ortega-Sanchez, Cesar and Murray, Iain. 2006. Text-to-braille translator in a chip, in Proceedings of the 4th International Conference on Electrical and Computer Engineering, Dec 19-21 2006, pp. 530-533. Dhaka, Bangladesh: Bangladesh University of Engineering and Technology.

This paper describes the hardware implementation of a text to Braille Translator using Field-Programmable Gate Arrays (FPGAs). Different from most commercial software-based translators, the circuit presented in this paper is able to carry out text-to-Braille translation in hardware. The translator is based on the translating algorithm, proposed by Paul Blenkhorn (Blenkhorn 1997). The Very high speed Hardware Description Language (VHDL) was used to describe the chip in a hierarchical way. The test results indicate that the hardware-based translator achieves the same results as software-based commercial translators, with superior throughput.

dc.publisherBangladesh University of Engineering and Technology
dc.subjectAssistive technology
dc.subjectEmbedded systems
dc.subjectBraille translation
dc.titleText-to-Braille Translator in a Chip
dc.typeConference Paper
dcterms.source.titleProcs. 4th International Conference on Electrical and Computer Engineering
dcterms.source.seriesProcs. 4th International Conference on Electrical and Computer Engineering
dcterms.source.conferenceInternational Conference on Electrical and Computer Engineering
dcterms.source.conference-start-dateDec 19 2006
dcterms.source.conferencelocationDhaka, Bangladesh
dcterms.source.placeDhaka, Bangladesh

Copyright 2006 IEEE


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curtin.accessStatusOpen access
curtin.facultyFaculty of Engineering and Computing
curtin.facultyDepartment of Electrical and Computer Engineering
curtin.facultyDivision of Engineering, Science and Computing

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