Show simple item record

dc.contributor.authorSzefer, J.
dc.contributor.authorZhang, W.
dc.contributor.authorChen, Y.
dc.contributor.authorChampagne, D.
dc.contributor.authorChan, King-Sun
dc.contributor.authorLi, W.
dc.contributor.authorCheung, R.
dc.contributor.authorLee, R.
dc.identifier.citationSzefer, J. and Zhang, W. and Chen, Y. and Champagne, D. and Chan, K. and Li, W. and Cheung, R. et al. 2011. Rapid single-chip secure processor prototyping on the Open SPARC FPGA platform, Proceedings of the 22nd IEEE International Symposium on Rapid System Prototyping, May 24-27 2011, pp. 38-44. Karsruhe: IEEE.

Secure processors have become increasingly important for trustworthy computing as security breaches escalate. By providing hardware-level protection, a secure processor ensures a safe computing environment where confidential data and applications can be protected against both hardware and software attacks. In this paper, we present a single-chip secure processor model and demonstrate rapid prototyping of the secure processor on the OpenSPARC FPGA platform. OpenSPARC T1 is an industry-grade, open-source, FPGA-synthesizable general-purpose microprocessor originally developed by Sun Microsystems, now acquired by Oracle. It is a multi-core, multi-threaded 64-bit processor with open-source hardware, including the microprocessor core, as well as system software that can be freely modified by researchers. We modify the OpenSPARC T1 processor by adding security modules: an AES engine, a TRNG and a memory integrity tree. These enhancements enable security features like memory encryption and memory integrity verification. By prototyping this single-chip secure processor on the FPGA platform, we find that the OpenSPARC T1 FPGA platform has many advantages for secure processor research. Our prototyping demonstrates that additional modules can be added quickly and easily and they add little resource overhead to the base OpenSPARC processor. © 2011 IEEE.

dc.titleRapid single-chip secure processor prototyping on the Open SPARC FPGA platform
dc.typeConference Paper
dcterms.source.titleProceedings of the International Workshop on Rapid System Prototyping
dcterms.source.seriesProceedings of the International Workshop on Rapid System Prototyping
curtin.departmentDepartment of Electrical and Computer Engineering
curtin.accessStatusFulltext not available

Files in this item


There are no files associated with this item.

This item appears in the following Collection(s)

Show simple item record