Harmonic elimination technique for a single-phase multilevel converter with unequal DC link voltage levels
| dc.contributor.author | Ghasemi, N. | |
| dc.contributor.author | zare, F. | |
| dc.contributor.author | Boora, A. | |
| dc.contributor.author | Ghosh, Arindam | |
| dc.contributor.author | Langton, C. | |
| dc.contributor.author | Blaabjerg, F. | |
| dc.date.accessioned | 2017-01-30T13:28:46Z | |
| dc.date.available | 2017-01-30T13:28:46Z | |
| dc.date.created | 2014-10-08T01:14:51Z | |
| dc.date.issued | 2012 | |
| dc.identifier.citation | Ghasemi, N. and zare, F. and Boora, A. and Ghosh, A. and Langton, C. and Blaabjerg, F. 2012. Harmonic elimination technique for a single-phase multilevel converter with unequal DC link voltage levels. IET Power Electronics. 5 (8): pp. 1418-1429. | |
| dc.identifier.uri | http://hdl.handle.net/20.500.11937/32038 | |
| dc.publisher | The Institution of Engineering and Technology | |
| dc.title | Harmonic elimination technique for a single-phase multilevel converter with unequal DC link voltage levels | |
| dc.type | Journal Article | |
| dcterms.source.volume | 5 | |
| dcterms.source.number | 8 | |
| dcterms.source.startPage | 1418 | |
| dcterms.source.endPage | 1429 | |
| dcterms.source.issn | 1755-4535 | |
| dcterms.source.title | IET Power Electronics | |
| curtin.accessStatus | Fulltext not available |