Low-voltage ride-through techniques for DFIG-based wind turbines: State-of-the-art review and future trends
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© 2013 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
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This paper deals with low-voltage ride-through (LVRT) capability of wind turbines (WTs) and in particular those driven by a doubly-fed induction generator (DFIG). This is one of the biggest challenges facing massive deployment of wind farms. With increasing penetration of WTs in the grid, grid connection codes in most countries require that WTs should remain connected to the grid to maintain the reliability during and after a short-term fault. This results in LVRT with only 15% remaining voltage at the point of common coupling (PCC), possibly even less. In addition, it is required for WTs to contribute to system stability during and after fault clearance. To fulfill the LVRT requirement for DFIG-based WTs, there are two problems to be addressed, namely, rotor inrush current that may exceed the converter limit and the dc-link overvoltage. Further, it is required to limit the DFIG transient response oscillations during the voltage sag to increase the gear lifetime and generator reliability. There is a rich literature addressing countermeasures for LVRT capability enhancement in DFIGs; this paper is therefore intended as a comprehensive state-of-the-art review of solutions to the LVRT issue. Moreover, attempts are made to highlight future issues so as to index some emerging solutions.
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