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dc.contributor.authorCheng, C.
dc.contributor.authorGopal, Lenin
dc.contributor.authorSidhu, Amandeep
dc.contributor.authorSingh, A.
dc.date.accessioned2017-01-30T15:21:09Z
dc.date.available2017-01-30T15:21:09Z
dc.date.created2016-08-07T19:30:51Z
dc.date.issued2016
dc.identifier.citationCheng, C. and Gopal, L. and Sidhu, A. and Singh, A. 2015. Design of low quantum cost reversible BCD adder, in Proceedings of the International Conference on Control System, Computing and Engineering (ICCSCE), Nov 27-29 2015, pp. 107-110. Penang, Malaysia: IEEE.
dc.identifier.urihttp://hdl.handle.net/20.500.11937/45468
dc.identifier.doi10.1109/ICCSCE.2015.7482167
dc.description.abstract

Reversible logic is one of the emerging computational methodologies which assures zero power dissipation through theoretical laws of thermodynamics. It has received significant interest in application on quantum computing, nanotechnologies and low power computing devices. In this work, we present a reversible logic implementation for Binary Coded Decimal (BCD) adder which is designed to obtain lowest quantum cost value. Other parameters such as ancilla input, garbage output and delay are kept at minimal. Experiment result shows that the proposed work outperforms other designs in terms of quantum cost. Considering for a 1 digit BCD adder, it has a 4% improvement in terms of quantum cost compared to the current best existing ones. The improvement range increases as the BCD digit becomes larger.

dc.titleDesign of low quantum cost reversible BCD adder
dc.typeConference Paper
dcterms.source.startPage107
dcterms.source.endPage110
dcterms.source.titleProceedings - 5th IEEE International Conference on Control System, Computing and Engineering, ICCSCE 2015
dcterms.source.seriesProceedings - 5th IEEE International Conference on Control System, Computing and Engineering, ICCSCE 2015
dcterms.source.isbn9781479982523
curtin.departmentCBS International
curtin.accessStatusFulltext not available


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