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dc.contributor.authorLee, Wei
dc.contributor.authorCaccetta, Louis
dc.contributor.authorRehbock, Volker
dc.date.accessioned2017-01-30T12:06:26Z
dc.date.available2017-01-30T12:06:26Z
dc.date.created2009-05-14T02:17:17Z
dc.date.issued2008
dc.identifier.citationLee, Wei and Caccetta, Louis and Rehbock, Volker. 2008. Optimal design of all-pass variable fractional-delay digital filters. IEEE Transactions on Circuits and Systems I: Regular Papers. 55 (5): pp. 1248-1256.
dc.identifier.urihttp://hdl.handle.net/20.500.11937/18188
dc.identifier.doi10.1109/TCSI.2008.916686
dc.description.abstract

This paper presents a computational method for the optimal design of all-pass variable fractional-delay (VFD) filters aiming to minimize the squared error of the fractional group delay subject to a low level of squared error in the phase response. The constrained optimization problem thus formulated is converted to an unconstrained least-squares (LS) optimization problem which is highly nonlinear. However, it can be approximated by a linear LS optimization problem which in turn simply requires the solution of a linear system. The proposed method can efficiently minimize the total error energy of the fractional group delay while maintaining constraints on the level of the error energy of the phase response. To make the error distribution as flat as possible, a weighted LS (WLS) design method is also developed. An error weighting function is obtained according to the solution of the previous constrained LS design. The maximum peak error is then further reduced by an iterative updating of the error weighting function. Numerical examples are included in order to compare the performance of the filters designed using the proposed methods with those designed by several existing methods.

dc.publisherInstitute of Electrical and Electronics Engineers-IEEE Circuits and Systems Society
dc.titleOptimal design of all-pass variable fractional-delay digital filters
dc.typeJournal Article
dcterms.source.volume55
dcterms.source.number5
dcterms.source.startPage1248
dcterms.source.endPage1256
dcterms.source.issn15498328
dcterms.source.titleIEEE Transactions on Circuits and Systems I: Regular Papers
curtin.note

Copyright © 2008 IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.

curtin.accessStatusOpen access
curtin.facultyDepartment of Mathematics and Statistics
curtin.facultySchool of Science
curtin.facultyFaculty of Science and Engineering


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