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    MiniMIPS: An 8-Bit MIPS in an FPGA for Educational Purposes

    Access Status
    Fulltext not available
    Authors
    Ortega-Sanchez, Cesar
    Date
    2011
    Type
    Conference Paper
    
    Metadata
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    Citation
    Ortega-Sanchez, Cesar. 2011. MiniMIPS: An 8-Bit MIPS in an FPGA for Educational Purposes, in P. Athanas, J. Becker, R. Cumplido (ed), International Conference on Reconfigurable Computing and FPGAs, Nov 30 - Dec 02 2011, pp. 152-157. Cancun, Mexico: IEEE.
    Source Title
    2011 International Conference on Reconfigurable Computing and FPGAs
    Source Conference
    2011 International Conference on Reconfigurable Computing and FPGAs
    DOI
    10.1109/ReConFig.2011.62
    ISBN
    978-0-7695-4551-6
    School
    Department of Electrical and Computer Engineering
    URI
    http://hdl.handle.net/20.500.11937/29120
    Collection
    • Curtin Research Publications
    Abstract

    Expectations of Electrical Engineering students about their courses have changed over the years. Even though the basic principles of Digital Electronics remain the same, tools and laboratory activities need to accommodate more demanding expectations. This paper presents MiniMIPS: an 8-bit implementation of the MIPS’s single-cycle architecture for educational purposes. The MiniMIPS is targeted to the BASYS Spartan 3E development board. The user interface consists of DIP switches, push-buttons, LEDs and four 7-segment displays. The instruction set consists of 9 instructions and 3 instruction formats. Programs for the MiniMIPS are developed in a custom-made assembler/simulator tool, also presented in this paper. A MiniMIPS assembly program to generate the Fibonacci series is presented as an example. A description of laboratory tasks currently used is offered.

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