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dc.contributor.authorOrtega-Sanchez, Cesar
dc.contributor.editorP. Athanas
dc.contributor.editorJ. Becker
dc.contributor.editorR. Cumplido
dc.identifier.citationOrtega-Sanchez, Cesar. 2011. MiniMIPS: An 8-Bit MIPS in an FPGA for Educational Purposes, in P. Athanas, J. Becker, R. Cumplido (ed), International Conference on Reconfigurable Computing and FPGAs, Nov 30 - Dec 02 2011, pp. 152-157. Cancun, Mexico: IEEE.

Expectations of Electrical Engineering students about their courses have changed over the years. Even though the basic principles of Digital Electronics remain the same, tools and laboratory activities need to accommodate more demanding expectations. This paper presents MiniMIPS: an 8-bit implementation of the MIPS’s single-cycle architecture for educational purposes. The MiniMIPS is targeted to the BASYS Spartan 3E development board. The user interface consists of DIP switches, push-buttons, LEDs and four 7-segment displays. The instruction set consists of 9 instructions and 3 instruction formats. Programs for the MiniMIPS are developed in a custom-made assembler/simulator tool, also presented in this paper. A MiniMIPS assembly program to generate the Fibonacci series is presented as an example. A description of laboratory tasks currently used is offered.

dc.publisherIEEE Computer Society
dc.subjectcomputer architecture
dc.subjecthardware for education
dc.titleMiniMIPS: An 8-Bit MIPS in an FPGA for Educational Purposes
dc.typeConference Paper
dcterms.source.title2011 International Conference on Reconfigurable Computing and FPGAs
dcterms.source.series2011 International Conference on Reconfigurable Computing and FPGAs
dcterms.source.conference2011 International Conference on Reconfigurable Computing and FPGAs
dcterms.source.conference-start-dateNov 30 2011
dcterms.source.conferencelocationCancun, Quintana Roo Mexico
dcterms.source.placeLos Alamitos, California
curtin.departmentDepartment of Electrical and Computer Engineering
curtin.accessStatusFulltext not available

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