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dc.contributor.authorZhang, Xuan
dc.contributor.authorOrtega-Sanchez, Cesar
dc.contributor.authorMurray, Iain
dc.contributor.editorBoemo, Eduardo et. al.
dc.date.accessioned2017-01-30T13:54:28Z
dc.date.available2017-01-30T13:54:28Z
dc.date.created2009-03-05T00:57:12Z
dc.date.issued2007
dc.identifier.citationZhang, Xuan and Ortega-Sanchez, Cesar and Murray, Iain. 2007. A system for fast Text-to-Braille translation based on FPGAs, in Boemo, E. et. al. (ed), 3rd Southern Conference on Programmable Logic (SPL '07), Feb 26 2007, pp. 125-130. Mar del Plata, Argentina: Institute of Electrical and Electronics Engineers (IEEE).
dc.identifier.urihttp://hdl.handle.net/20.500.11937/36235
dc.identifier.doi10.1109/SPL.2007.371735
dc.description.abstract

This paper describes a fast text to Braille translator based on Field Programmable Gate Arrays (FPGAs). Compared with most commercial methods, this translator is able to carry out the translation in hardware instead of using software. To achieve the fast translation, a FPGA with big programmable resource has been utilized, and an algorithm, proposed by Paul Blenkhorn, has been revised to perform the fast translation. The translator has been described using Very high speed integrated circuit Hardware Description Language (VHDL). The test results indicate that the hardware-based translator achieves the same results as software-based commercial translators, and moreover, this system achieves superior throughput compared to Blenkhorn's original algorithm.

dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.subjectFPGA application
dc.subjectAssistive technology
dc.subjectBraille
dc.titleA system for fast Text-to-Braille translation based on FPGAs
dc.typeConference Paper
dcterms.source.startPage125
dcterms.source.endPage130
dcterms.source.titleProceedings of the 2007 3rd Southern Conference on Programmable Logic
dcterms.source.seriesProceedings of the 2007 3rd Southern Conference on Programmable Logic
dcterms.source.isbn1424406064
dcterms.source.conference3rd Southern Conference on Programmable Logic
dcterms.source.conference-start-date26 Feb 2007
dcterms.source.conferencelocationMar del Plata, Argentina
dcterms.source.placeArgentina, IEEExplore
curtin.note

Copyright © 2007 IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder.

curtin.accessStatusOpen access
curtin.facultySchool of Electrical Engineering and Computing
curtin.facultyDepartment of Electrical and Computer Engineering
curtin.facultyFaculty of Science and Engineering


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