FPGA multi-filter system for speech enhancement via multi-criteriaoptimization
|dc.contributor.author||Low, Siow Yong|
|dc.identifier.citation||Yiu, C. and Li, Z. and Low, S.Y. and Nordholm, S. 2014. FPGA multi-filter system for speech enhancement via multi-criteria optimization. Applied Soft Computing. 21: pp. 533-541.|
Speech is the main medium for human communication and interaction. Apart from the traditional telephones, more and more applications come with speech interfaces, which use speech signal as an input for various purposes. However, many of these applications might fail to perform in noisy environments as the signal-to-noise ratio (SNR) degrades. Two important measures for any speech enhancement algorithm are noise suppression and speech distortion. Naturally, different speech enhancement algorithms will have different trade-offs. Moreover, depending on the environment, it is possible that one algorithm will outperform the others in some respects. This paper proposes a multi-filter system, which has the capability of continually adjusting the noise suppression level and the speech distortion level in a Pareto fashion. Moreover, we show that the system works under a variety of noisy environments and we obtain the efficient frontier of the combined filters for each background noise. Because the multi-filters are adapting in parallel, the final system can be implemented on FPGA efficiently.
|dc.title||FPGA multi-filter system for speech enhancement via multi-criteriaoptimization|
|dcterms.source.title||Applied Soft Computing|
|curtin.department||Department of Electrical and Computer Engineering|
|curtin.accessStatus||Fulltext not available|