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    Software implementation of two seamless redundant topologies in a digital protection system based on IEC 62439-3

    Access Status
    Fulltext not available
    Authors
    Kumar, S.
    Das, N.
    Islam, Syed
    Date
    2016
    Type
    Conference Paper
    
    Metadata
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    Citation
    Kumar, S. and Das, N. and Islam, S. 2016. Software implementation of two seamless redundant topologies in a digital protection system based on IEC 62439-3, in Proceedings of the Australasian Universities Power Engineering Conference- AUPEC, Sep 25-28 2016, pp. 203. Brisbane, Australia: IEEE.
    Source Title
    Proceedings of the 2016 Australasian Universities Power Engineering Conference, AUPEC 2016
    DOI
    10.1109/AUPEC.2016.07749323
    ISBN
    9781509014057
    School
    Department of Electrical and Computer Engineering
    URI
    http://hdl.handle.net/20.500.11937/47159
    Collection
    • Curtin Research Publications
    Abstract

    Substations are the junctions of any transmission and distribution network in utilities. They carry bulk power to the customers using transmission network involving high voltage (HV) apparatus. Protection of HV equipment during a fault is the primary concern of an operator. Advancement in design and manufacturing of Intelligent Electronic Devices (IEDs) and IEC 61850 are finding increased application in utilities from automation and communication perspective, which addresses few shortcomings that couldn't be resolved in a conventional system. However there are few challenges in the digital scheme such as end to end delays in the packet transfer and interoperability of devices. Utilities are able to perceive these benefits by leveraging on IEC 62439-3 which has two important topologies i.e. Parallel Redundancy Protocol (PRP) and High-availability Seamless Redundancy (HSR). It offers seamless redundancy in digital protection network without compromising the availability and downtime cost. In this paper, an Optimized Network Engineering Tool (OPNET) is used to simulate and compare the performance of these topologies with respect to delay time.

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