Show simple item record

dc.contributor.authorDargahi, M.
dc.contributor.authorGhosh, Arindam
dc.contributor.authorLedwich, G.
dc.contributor.authorzare, F.
dc.contributor.editorDr Tomy Sebastian
dc.contributor.editorNexteer Automotive Future Enginering
dc.date.accessioned2017-01-30T11:09:23Z
dc.date.available2017-01-30T11:09:23Z
dc.date.created2014-10-08T01:14:49Z
dc.date.issued2012
dc.identifier.citationDargahi, M. and Ghosh, A. and Ledwich, G. and zare, F. 2012. PEDES 2012 - IEEE International Conference on Power Electronics, Drives and Energy Systems, in Dr Tomy Sebastian, Nexteer Automotive Future Enginering (ed), PEDES 2012 - IEEE International Conference on Power Electronics, Drives and Energy Systems, Dec 16 2012. Bengaluru, Karnataka; India: Institute of Electrical and Electronics Engineers ( IEEE ).
dc.identifier.urihttp://hdl.handle.net/20.500.11937/8914
dc.description.abstract

In power hardware in the loop (PHIL) simulations, a real-time simulated power system is interfaced to a piece of hardware, usually called hardware under test (HuT). A PHIL test can be realized using several simulation tools. Among them Real Time Digital Simulator (RTDS) is an ideal tool to perform complex power system simulations in near real-time. Stable operation of the entire system, along with the accuracy of simulation results are the main concerns regarding a PHIL simulation. In this paper, a simulated power network on RTDS will be interfaced to HuT through a voltage source converter (VSC). Issues around stability and other interface problems are studied and a new method to stabilize some unstable PHIL cases is proposed. PHIL simulation results in PSCAD and RSCAD are presented.

dc.publisherInstitute of Electrical and Electronics Engineers ( IEEE )
dc.titlePEDES 2012 - IEEE International Conference on Power Electronics, Drives and Energy Systems
dc.typeConference Paper
dcterms.source.titleStudies in power hardware in the loop (PHIL) simulation using real-time digital simulator (RTDS)
dcterms.source.seriesStudies in power hardware in the loop (PHIL) simulation using real-time digital simulator (RTDS)
dcterms.source.isbn978-1-4673-4508-8
dcterms.source.conferencePEDES 2012 - IEEE International Conference on Power Electronics, Drives and Energy Systems
dcterms.source.conference-start-dateDec 16 2012
dcterms.source.conferencelocationBengaluru, Karnataka; India
dcterms.source.placeUS
curtin.accessStatusFulltext not available


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record